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[VHDL-FPGA-Verilog] hdl

Description: 用Verilog语言编写的实现NAND Flash块的控制存取以及同步的FIFO的控制-Using Verilog languages realize NAND Flash block to control access as well as the synchronization FIFO control
Platform: | Size: 6144 | Author: 刘义春 | Hits:

[Other] altera_nand_controller

Description: Altera合作伙伴Eureka Technology.和Cast Inc.为Altera FPGA芯片定制的Nand flash controller IP core-Altera partner Eureka Technology. And the Cast Inc. For the Altera FPGA chip custom Nand flash controller IP core
Platform: | Size: 296960 | Author: Trevor | Hits:

[VHDL-FPGA-Verilog] NAND_Flash_Controller

Description: FPGA实现的NandFlash控制器（带ECC）文档+源代码。-FPGA implementation NandFlash controller (with ECC) document+ source code.
Platform: | Size: 1587200 | Author: 李银 | Hits:

[VHDL-FPGA-Verilog] NandFlash-FPGA-controller(ECC)

Description: 该压缩包包括NAND FLASH（美光）的FPGA控制器的原理及VHDL源码，非常具有参考价值。-The archive includes NAND FLASH (Micron) the principle of the FPGA and VHDL source code control, very valuable reference.
Platform: | Size: 1587200 | Author: 张明利 | Hits:

[VHDL-FPGA-Verilog] NANDController

Description: verilog编写的nand flash的控制程序 -nand flash controller based on verilog
Platform: | Size: 18432 | Author: 刘志超 | Hits:

[Other] NandController(lattice)

Description: NAND Flash控制器源码 Verilog-NAND Flash controller source Verilog
Platform: | Size: 584704 | Author: wang | Hits:

[VHDL-FPGA-Verilog] NAND_flash_verilog_vhdl

Description: 很好的NAND Flash 硬件驱动语言，支持VHDL和verilog 语言方便移植，如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。- NAND Flash Controller Reference Design =============================================================================== File List 1. RD1055/doc/rd1055.pdf --> NAND Flash Controller Reference Design document RD1055/doc/rd1055_readme.txt --> Read me file (this file) 2. RD1055/Project/nand_flash_cntl.lpf --> preference file for the design RD1055/Project/nfcm_tb_vhd.udo_example --> vital glitch removal example 3. /RD1055/simulation/verilog/rtl_verilog.do --> verilog rtl simulation script /RD1055/simulation/verilog/timing_verilog.do --> verilog timing simulation script /RD1055/simulation/vhdl/rtl_verilog.do --> vhdl rtl simulation script /RD1055/simulation/vhdl/timing_verilog.do --> vhdl timing simulation script 4. RD1055/source/verilog/ACounter.v --> sourc
Platform: | Size: 1192960 | Author: cuiwei | Hits:

[VHDL-FPGA-Verilog] ahb_ebc

Description: Sipmle external bus controller realization on Verilog HDL with AHB interface. Support RAM/ROM/NAND Flash devices.
Platform: | Size: 10240 | Author: scnn86 | Hits:

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